2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>

	* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
	Also correct mistake in the comment.

2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>

	* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
	ensure that double registers have even numbers.
	Add REG_N_B01 for nn01 (binary 01) nibble to ensure
	that reserved instruction 0xfffd does not decode the same
	as 0xfdfd (ftrv).
	* sh-opc.h: Add REG_N_D nibble type and use it whereever
	REG_N refers to a double register.
	Add REG_N_B01 nibble type and use it instead of REG_NM
	in ftrv.
	Adjust the bit patterns in a few comments.

2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
                                                                                
        * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>

	* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>

	* ppc-opc.c (powerpc_opcodes): Add m*ivor35.

2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 
        * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
        mtivor32, mtivor33, mtivor34.

2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 
        * ppc-opc.c (powerpc_opcodes): Add mfmcar.

2004-02-10  Petko Manolov  <petkan@nucleusys.com>

	* arm-opc.h Maverick accumulator register opcode fixes.

2004-02-13  Ben Elliston  <bje@wasabisystems.com>

	* m32r-dis.c: Regenerate.

2004-01-27  Michael Snyder  <msnyder@redhat.com>

	* sh-opc.h (sh_table): "fsrra", not "fssra".

2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>

	* sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
	contraints.

2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>

	* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.

2004-01-19  Alan Modra  <amodra@bigpond.net.au>

	* i386-dis.c (OP_E): Print scale factor on intel mode sib when not
	1.  Don't print scale factor on AT&T mode when index missing.

2004-01-16  Alexandre Oliva  <aoliva@redhat.com>

	* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
	when loaded into XR registers.

2004-01-14  Richard Sandiford  <rsandifo@redhat.com>

	* frv-desc.h: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-opc.c: Regenerate.

2004-01-13  Michael Snyder  <msnyder@redhat.com>

	* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.

2004-01-09  Paul Brook  <paul@codesourcery.com>

	* arm-opc.h (arm_opcodes): Move generic mcrr after known
	specific opcodes.

2004-01-07  Daniel Jacobowitz  <drow@mvista.com>

	* Makefile.am (libopcodes_la_DEPENDENCIES)
	(libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
	comment about the problem.
	* Makefile.in: Regenerate.

2004-01-06  Alexandre Oliva  <aoliva@redhat.com>

	2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
	cut&paste errors in shifting/truncating numerical operands.
	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
	(parse_uslo16): Likewise.
	(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
	(parse_d12): Parse gotoff12 and gotofffuncdesc12.
	(parse_s12): Likewise.
	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
	* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
	(parse_uslo16): Likewise.
	(parse_uhi16): Parse gothi and gotfuncdeschi.
	(parse_d12): Parse got12 and gotfuncdesc12.
	(parse_s12): Likewise.

2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>

	* msp430-dis.c (msp430_doubleoperand): Check for an 'add'
	instruction which looks similar to an 'rla' instruction.

For older changes see ChangeLog-0203

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